Upskill With Advanced UVM Course
Upskill your VLSI workforce by helping them get equipped with an industry-standard skills on Advanced UVM, taught by highly experienced VLSI trainers with 15+ years experience.
Highlights
What you'll learn?
SystemVerilog Refresher
Advanced UVM
UVM Coding guidelines for Simulation Performance
UVM Labs : AHB UVC
VIP Coding Guidelines
Case Study
Bluetooth VIP - Modelling the BLE protocol stack in UVM
RISC V UVM TB - Verification Planning and sign-off
SoC Verification Flow — Reusing IP level UVM TBs and Legacy HDL based TB components
Labs & Demos
Who Will Train You?
Sivakumar P R, Founder & CEO
Sivakumar has 25+ Years of experience in Electrical Engineering, Academia, and Semiconductors. Trained more than 5000 NCGs and experienced engineers on VLSI Design and Verification for the global VLSI MNCs.
Putta Satish, Principal Engineer
Satish has 14+ years of experience in VLSI Verification & Training. He has delivered VLSI Trainings on SystemVerilog, UVM & RISC-V to 1500+ VLSI engineers across the world's top semiconductor companies.
Shanthi V A, Principal Engineer
Shanthi has a 10+ Years of experience in VLSI verification and training and has proficiently delivered VLSI Trainings on SystemVerilog, UVM & RISC-V to 3000+ VLSI engineers across the world's top semiconductor companies.
Our Corporate Training Solutions
